Re: [oc] DPLL

["Sam Gladstone" <samg@t-and-t.com>]

Ok, I am not sure of satellite comunication but I have worked on a wireless
lan.
On 802.11a you have a ~5 GHz carrier with subbands that are the channels.(As
I understand it.)
For receiving the data,
You have to have an analog circuit that senses the signal and begins
modulating the
ADC, gains and VCOs to sync with the signal. There are also FIR firters
there to
do other corrections. (I didn't work on this section but I knew it was a
real pain.)
The digital signal is then fed into a FFT to recover the channels properly.
(There are dummy channels in the 64 spaces.)
A DSP is then usually needed to do proper de-interleaving to the FFT
addresses and then correct for strange error effects by shifting the phase
and adjusting the power of the QPSK constellation data.
You are then ready to do demodulation of the constellations into softbits.
Then de-interleave the data properly to the type of encoding.
Depuncture the data if necessary.
Run it though a Viterbi to correct for bit errors.
The run the data through an LFSR based descrambler.
Then you are ready to send it to a MAC which will check the CRC and then
do more security based descrambling and recover the frames.

I personally don't remember a data bit clock anywhere. Just an extraction of
constellation data
from the FFT's that needed to be corrected and demodulated. We decoded one
frame at a time which filled up the FFT and we just decoded the 54 or so
constellations and waited to receive another frame after we transmitted that
the previous frame looked ok.
I designed the full PHY backend receiver with another guy that included the
FFT, DSP and the MCS (modulation, coding and scrambling) (We designed an
awesome Viterbi for that module that did not need RAMs and put many IP
vendors versions to shame in terms of
latency and size and clock speed.)

Regards,
  Sam

----- Original Message -----
From: <haoguang.guo@philips.com>
To: <cores@opencores.org>
Sent: Wednesday, November 14, 2001 5:58 PM
Subject: Re: [oc] DPLL


> Hi,
>            I have a problem about  bit synchronization when use QPSK in
satellite communication. When design the demodulator , how can i get the
> bit clock?  Some one said because of the fading and unknown delay , you
can not synchroniza to the transmitter . so must  use the equalizer to
estimate the channel. Is it right?
>
>
>
>
>
>
>
>
> "Sam Gladstone" <samg@t-and-t.com>@opencores.org on 11/15/2001 06:29:28 AM
>
> Please respond to cores@opencores.org
>
> Sent by:  owner-cores@opencores.org
>
>
> To:     <cores@opencores.org>
> cc:      (bcc: Haoguang Guo/SHA/SC/PHILIPS)
> Subject:  Re: [oc] DPLL
> Classification:
>
>
>
> I take it you are demodulating back to a certain softbit size?
> There is several books out there that are pretty good. I will find the
> one I used when we were writing an 802.11a phy for a company.
>
> The main idea is to demodulate each dimension of the QPSKconstellation
data
> seperately by
> breaking the real and imaginary up into two seperate demodulations.
Linear
> extrapolations can be used to generate softbits for a first order method.
> There are more cost effective, but
> harder to understand methods available as well.
> (Assuming that you have already done the proper power and phase
> corrections.)
> I think the number of softbits generated looks like this table.
> BPSK - 1 softbit per constellation
> QPSK - 2 softbits per constellation
> QAM-16 - 4 softbits per constellation
> QAM-64 - 6 softbits per constellation
> (QAMs get nasty because they are like combinations of different codings
that
> have
> to have multiple softbits generated per demension because of grey coding
> with the
> modulution module. Yuck! )
>
> I will try to find the book name and send it out.
>
> Regards,
>   Sam
>
> ----- Original Message -----
> From: <aolmo@grupoeyp.com>
> To: <cores@opencores.org>
> Sent: Wednesday, November 14, 2001 9:24 AM
> Subject: [oc] DPLL
>
>
> > Hi,
> >
> > I take the liberty disturbing you.
> > I am a friend from Taiwan.
> > After reading your posts on Web, I know you are a professional
> > communication designer.
> > Now I am designing QPSK demodulator for wireless Lan with verilog.
> > Where can I find more helpful material, such as verilog code for DPLL.
> > Please kindly to give me some advice.
> > Thank you a lot!
> > --
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> >
> >
>
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