Can some one provide me a synthsizble verilog code fro ROM.
I have tried to instante the rom from xilinx libray but was no successfull in intiatlizing it
the syntax i used is
rom16x1 rom1(a0,a1,a2,a3,out);
inst rom1 init=5050;
the init attribute need's to initalized .i am familar with vhdl and have initalizedd using init attribute by adding the attribute to the inistancein vhdl but i am not sure abt the verilog syntax. can some one help.
i have wiretten not a very efficent code using case statemnt for rom
case(address)
4'b0000: dataout=8'b10100100
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i want to know if there is any to use memories in verilog. the problem here is tht index is intger, is it possible to pass intger to the address port of rom.
thanking in anticipation
ts