Re: [pci] BAR

["Miha Dolenc" <mihapci@email.si>]

OK,
     I think I see what bothers you.
PCI base address is not fixed in advance. BIOS is responsible for setting
base addresses of all PCI devices it finds on the bus (it finds them by slot
number in which they are connected).
PCI devices implement up to six BARs. Each BAR has some bits implemented and
some not - that's how ammount of used space is determined.
If you implement only upper 12 bits of your BAR0, that means that lower 20
bits are always 0 and are not used in address decoding - that gives you a
range of 1MB.
Since your board has 32MB of SDRAM, you should use only upper 7 bits of your
BAR0.
How BIOS determines an ammount of space used? It writes a value H'FFFFFFFF
into your device's BAR. Then it reads this register. If you implement only
upper 7 bits of this BAR, it will read back a value H'FE000000 - then it
calculates amount of address space used by your card and maps it somewhere
in address space.
Device driver must determine base address of the device before it can use
it. I don't know how this is done - I think OS kernel implements functions
for determining Base Address of specific device. I'm sure you can find this
on the internet somewhere.

For your board, you should probably use two BARs - one for SDRAM and one for
I/O control signals.

I hope this helped - you are welcome to post any more questions.

Regards, Miha


----- Original Message -----
From: "Isa Servan Uzun" <uzun@bornova.ege.edu.tr>
To: <pci@opencores.org>
Sent: Wednesday, May 02, 2001 12:43 PM
Subject: Re: [pci] BAR


> Hi,
>
> I have a 64-bit PCI Board.
> There is 32 I/O lines which are directly connected to the FPGA (Altera
> APEX20KE400) on the board.
> And there is a 32MB (64-bit * 4M) SDRAM memory on this board.
> This board is used to control an external device and acquire data from it.
>
> I need to read and write data (from files on the computer) from/to this
> SDRAM. And according to the some control signals (coming from I/O lines)
> I need the output a pattern from SDRAM to output I/O lines.
>
> Also I need 3 8-bit Configuration Bytes.
> I mean when the user changes this parameter from user interface software
on
> the host, the I/O
> lines should changes according to this chosen value.
>
> For example,
>
> When the user selects number_of_data  (which is one of the 3 configuration
> bytes)
> is decimal 5 from a pulldown menu, the 8-bit output lines should change to
> "00000101" (binary) state.
> This value shall indicate to the external device the number of data to be
> transferred.
>
> My problem is interfacing with the PCI bus. I have Altera pci_mt64
megacore
> function. But as I told you before
> I have no experience on PCI.
>
> Thanks for your help.
>
>
> ----- Original Message -----
> From: "Miha Dolenc" <mihaPCI@email.si>
> To: <pci@opencores.org>
> Sent: Wednesday, May 02, 2001 12:04 PM
> Subject: Re: [pci] BAR
>
>
> > Hi,
> >
> > BAR normally stands for Base Address Register, so if you set it to
> > H'FFF00000, then start address of this space is H'FFF00000.
> > But I don't know if I understood your question correctly. Value of
> > H'FFF00000 looks more like Address Mask to me, which reserves 1MB of
> address
> > space.
> > And a question - isn't address decoding part of PCI core? If it is,
there
> is
> > probably some signal indicating that current access is claimed by your
> core.
> > If address decoding isn't part of PCI core, than send another email, but
> > please describe your problem with more information (all registers that
> have
> > to be involved in address decoding and their description), so we can
help
> > you find the right
> > solution.
> >
> > Regards,
> >     Miha
> >
> > ----- Original Message -----
> > From: I. Servan Uzun
> > To: pci@opencores.org
> > Sent: Tuesday, May 01, 2001 1:47 PM
> > Subject: [pci] BAR
> >
> >
> > Hi,
> >
> > I' m learning to use 64-bit pci_core.
> >
> > I need 1MB of registers. I can reserve 1MByte of system space by setting
> > BAR0 to
> > "H'FFF00000".
> > But this only reserves 1 MB of address space.
> > What is the start address of this space and how I can decode it?
> >
> > Regards,
> > Servan
> >
> >
> >
> >
> >
> >
>