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Re: [oc] verilog to vhdl converter

To: cores@opencores.org
Subject: Re: [oc] verilog to vhdl converter
From: Rudolf Usselmann <rudi@asics.ws>
Date: 07 Apr 2003 17:23:53 +0700
In-Reply-To: <040c01c2fd37$9f1b72c0$ed01ed0a@flextronics.si>
Organization: ASICS.ws - Solutions for your ASICS & FPGA needs -
References: <20030404101531.GD21011@cockatoo.taudelta.com.au> <1049452150.29094.276.camel@linux8k> <040c01c2fd37$9f1b72c0$ed01ed0a@flextronics.si>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org

On Tue, 2003-04-08 at 01:57, Damjan Lampret wrote:
> Sure. I see no problem for a new section. We'll add tools or software
> section or something like that.
> 
> regards,
> Damjan

I would suggest "Tools" for tools, and reserve
"Software" for later. May be we want to move the
GNU chain for OR1K to the software section at
some point, and have various open drivers for
various cores, etc., etc.

Regards,
rudi
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References:
- [oc] verilog to vhdl converter
  - From: John Sheahan <jrsheahan@optushome.com.au>
- Re: [oc] verilog to vhdl converter
  - From: Rudolf Usselmann <rudi@asics.ws>
- Re: [oc] verilog to vhdl converter
  - From: "Damjan Lampret" <lampret@opencores.org>

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