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Re: [oc] verilog to vhdl converter

To: cores@opencores.org
Subject: Re: [oc] verilog to vhdl converter
From: Rudolf Usselmann <rudi@asics.ws>
Date: 07 Apr 2003 18:28:30 +0700
In-Reply-To: <068401c2fd4a$599c06c0$ed01ed0a@flextronics.si>
Organization: ASICS.ws - Solutions for your ASICS & FPGA needs -
References: <20030404101531.GD21011@cockatoo.taudelta.com.au> <1049452150.29094.276.camel@linux8k> <20030407184002.C1641@bing.> <1049711425.16240.408.camel@linux8k> <068401c2fd4a$599c06c0$ed01ed0a@flextronics.si>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org

On Tue, 2003-04-08 at 04:11, Damjan Lampret wrote:
> Either way is fine with me.
> 
> regards,
> Damjan


How about a direct link from the Main OC site to
the gEDA site to make people more aware of it ?

Is everybody else happy with referring tools to
gEDA site ?

Regards,
rudi
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Follow-Ups:
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References:
- [oc] verilog to vhdl converter
  - From: John Sheahan <jrsheahan@optushome.com.au>
- Re: [oc] verilog to vhdl converter
  - From: Rudolf Usselmann <rudi@asics.ws>
- Re: [oc] verilog to vhdl converter
  - From: John Dalton <john.dalton@bigfoot.com>
- Re: [oc] verilog to vhdl converter
  - From: Rudolf Usselmann <rudi@asics.ws>
- Re: [oc] verilog to vhdl converter
  - From: "Damjan Lampret" <lampret@opencores.org>

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