Mail Index
Thread Index
Re: [openrisc] or1k arch manual
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
[openrisc] or1k arch manual
From
: "Damjan Lampret" <lampret@opencores.org>
[openrisc] Interrupt servicing
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <csanchez@teisa.unican.es>
[openrisc] Field OF64S in CPUCFGR
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
Re: [openrisc] Function prologue and stack frame
From
: Simon Srot <simons@flextronics.si>
Re: [openrisc] Function prologue and stack frame
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <csanchez@teisa.unican.es>
Re: [openrisc] Power Management Unit
From
: "Damjan Lampret" <lampret@opencores.org>
[openrisc] Power Management Unit
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
Re: [openrisc] l.mtspr instruction
From
: Marko Mlinar <markom@opencores.org>
Re: [openrisc] Field CWS in ICCFGR
From
: Marko Mlinar <markom@opencores.org>
Re: [openrisc] Reset exception
From
: Marko Mlinar <markom@opencores.org>
[openrisc] l.mtspr instruction
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
[openrisc] Field CWS in ICCFGR
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
[openrisc] Field OF64S in CPUCFGR
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
Re: [openrisc] Function prologue and stack frame
From
: Simon Srot <simons@opencores.si>
Re: [openrisc] Function prologue and stack frame
From
: Carlos S嫕chez de La Lama <csanchez@teisa.unican.es>
[openrisc] an EE Times article about OR1200
From
: "Damjan Lampret" <lampret@opencores.org>
Re: [openrisc] OpenRisc on VirtexPro
From
: "Damjan Lampret" <lampret@opencores.org>
Re: [openrisc] FPGA board
From
: "Damjan Lampret" <lampret@opencores.org>
Re: [openrisc] OpenRisc on VirtexPro
From
: =?ISO-8859-15?Q?BERTRAND_Jo=EBl?= <joligibus@free.fr>
[openrisc] OpenRisc on VirtexPro
From
: patrick.pelgrims@pandora.be
[openrisc] Reset exception
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
Re: [openrisc] FPGA board
From
: Patrick Pelgrims <patrick.pelgrims@pandora.be>
Re: [openrisc] FPGA board
From
: "Damjan Lampret" <lampret@opencores.org>
Re: [openrisc] Development interface GPR address
From
: "Damjan Lampret" <lampret@opencores.org>
[openrisc] Development interface GPR address
From
: "Javier Castillo" <javier@teisa.unican.es>
[openrisc] FPGA board
From
: patrick.pelgrims@pandora.be
Re: [openrisc] Function prologue and stack frame
From
: Marko Mlinar <markom@opencores.org>
[openrisc] Function prologue and stack frame
From
: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <Carlos.Sanchez@gmx.net>
[openrisc] 很值得看一看喔!尤其是有喜歡的人!!
From
: jack@yahoo.com.tw
Re: [openrisc] ORP and reset vector
From
: Marko Mlinar <markom@opencores.org>
Re: [openrisc] ORP and reset vector
From
: "Sung-taek Lim" <stlim76@hotmail.com>
Re: [openrisc] ORP and reset vector
From
: Marko Mlinar <markom@opencores.org>
Re: [openrisc] ORP and reset vector
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
[openrisc] ORP and reset vector
From
: "Sung-taek Lim" <stlim76@hotmail.com>
Re: [openrisc] Shift Instructions
From
: Marko Mlinar <markom@opencores.org>
Re: [openrisc] Vector Instructions
From
: Marko Mlinar <markom@opencores.org>
[openrisc] Shift Instructions
From
: Mar燰 Bolado <mbolado@teisa.unican.es>
Mail converted by
MHonArc
2.4.4