Mail Index

• Thread Index

• Re: [openrisc] OR1200 ASIC Success probabilities.
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] OR1200 ASIC Success probabilities.
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] OR1200 ASIC Success probabilities.
  • From: Christian Melki <christian.melki@axis.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: Re: [openrisc] patch approval ?
  • From: "Àî³±¼¤" <li_c_j@sohu.com>
• [openrisc] Re: Patch to simulator: "xterm" channels on linux
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] patch approval ?
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] patch approval ?
  • From: Marko Mlinar <markom@opencores.org>
• RE: [openrisc] patch approval ?
  • From: Chris <geo@tfb.com>
• RE: [openrisc] patch approval ?
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] patch approval ?
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] PIC documentation
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] PIC documentation
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] or1ksim UART bug fix
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] or1ksim feature: tcp channels
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] patch approval ?
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] A question about Binutils for or1200!
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] or1ksim feature: tcp channels
  • From: "Scott Furman" <sfurman@rosum.com>
• [openrisc] or1ksim UART bug fix
  • From: "Scott Furman" <sfurman@rosum.com>
• [openrisc] gdb fixes
  • From: "Scott Furman" <sfurman@rosum.com>
• [openrisc] patch approval ?
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] PIC documentation
  • From: "Scott Furman" <sfurman@rosum.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• RE: [openrisc] PIC documentation
  • From: "Scott Furman" <sfurman@rosum.com>
• Re: [openrisc] A question about Binutils for or1200!
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] A question about Binutils for or1200!
  • From: xu hu <giro_cn@yahoo.com>
• [openrisc] A question about Binutils for or1200!
  • From: xu hu <giro_cn@yahoo.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Boot sequence for OR1200
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] Boot sequence for OR1200
  • From: Ambarish Sule <amsor1k@yahoo.co.in>
• Re: [openrisc] PIC documentation
  • From: Bryan Richter <bryan@hilbrichter.com>
• Re: [openrisc] PIC documentation
  • From: Scott Furman <sfurman@rosum.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] how to get start??
  • From: Marko Mlinar <markom@opencores.org>
• RE: [openrisc] PIC documentation
  • From: "Scott Furman" <sfurman@rosum.com>
• Re: [openrisc] PIC documentation
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] how to get start??
  • From: vlsi235@yahoo.com.tw
• Re: [openrisc] Cell not translated
  • From: "LuoLei2000" <luolei2000@hotmail.com>
• Re: [openrisc] Cell not translated
  • From: "LuoLei2000" <luolei2000@hotmail.com>
• Re: [openrisc] Cell not translated
  • From: "lei luo" <luolei2000@hotmail.com>
• Re: [openrisc] Cell not translated
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Cell not translated
  • From: Richard Herveille <richard@asics.ws>
• [openrisc] PIC documentation
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] Cell not translated
  • From: "Jerry English" <jenglish@wherenet.com>
• [openrisc] Cell not translated
  • From: luolei2000@hotmail.com
• [openrisc] Cell not translated
  • From: "LuoLei2000" <luolei2000@hotmail.com>
• Re: [openrisc] Automake problem in or1ksim Installation
  • From: amsor1k@yahoo.co.in
• Re: [openrisc] Automake problem in or1ksim Installation
  • From: Richard Prescott <rip@step.polymtl.ca>
• [openrisc] Automake problem in or1ksim Installation
  • From: Ambarish Sule <amsor1k@yahoo.co.in>
• [openrisc] Wishbone Registered Inputs
  • From: kbuttle@nimbuswireless.com
• Re: [openrisc] Running ORPsoc simulator
  • From: Marko Mlinar <markom@opencores.org>
• RE: [openrisc] Running ORPsoc simulator
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] regression
  • From: mphan@nimbuswireless.com
• [openrisc] regression
  • From: Damjan Lampret <lampret@opencores.org>
• Re: [openrisc] ORP_SOC RTL Regression
  • From: mphan@nimbuswireless.com
• Re: [openrisc] Running ORPsoc simulator
  • From: "Simon Srot" <simons@opencores.org>
• Re: [openrisc] l.trap instruction argument ?
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Running ORPsoc simulator
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] l.trap instruction argument ?
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] Running ORPsoc simulator
  • From: "Scott Furman" <sfurman@rosum.com>
• RE: [openrisc] Running ORPsoc simulator
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] UART Interrupts
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] UART Interrupts
  • From: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <csanchez@teisa.unican.es>
• Re: [openrisc] Running ORPsoc simulator
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] Immediate value in l.nop instruction
  • From: "Damjan Lampret" <lampret@opencores.org>
• RE: [openrisc] Running ORPsoc simulator
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] Immediate value in l.nop instruction
  • From: Carlos Sánchez de La Lama <csanchez@teisa.unican.es>
• Re: [openrisc] List of False Timing Paths for OR1200
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Immediate value in l.nop instruction
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Running ORPsoc simulator
  • From: Marko Mlinar <markom@opencores.org>
• Re: [openrisc] Function prologue and stack frame
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] List of False Timing Paths for OR1200
  • From: kbuttle@nimbuswireless.com
• [openrisc] FW: Running ORPsoc simulator
  • From: "Robert Cragie" <rcc@jennic.com>
• [openrisc] Section attributes in gcc
  • From: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <csanchez@teisa.unican.es>
• [openrisc] Immediate value in l.nop instruction
  • From: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?= <csanchez@teisa.unican.es>
• [openrisc] Running ORPsoc simulator
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] Function prologue and stack frame
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Function prologue and stack frame
  • From: Marko Mlinar <markom@opencores.org>
• RE: Re: [openrisc] Function prologue and stack frame
  • From: "Scott Furman" <sfurman@rosum.com>
• Re: [openrisc] Function prologue and stack frame
  • From: "Scott Furman" <sfurman@rosum.com>
• Re: [openrisc] ORP_SOC RTL Regression
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Function prologue and stack frame
  • From: sfurman@nospam_rosum.com
• [openrisc] RISC I architecture
  • From: yasir_regs@yahoo.com
• Re: [openrisc] ORP_SOC RTL Regression
  • From: mphan@nimbuswireless.com
• Re: [openrisc] ORP_SOC RTL Regression
  • From: "Damjan Lampret" <lampret@opencores.org>
• [openrisc] ORP_SOC RTL Regression
  • From: mphan@nimbuswireless.com
• Re: [openrisc] Interrupt servicing
  • From: "Robert Cragie" <rcc@jennic.com>
• Re: [openrisc] Problems building tools
  • From: Marko Mlinar <markom@opencores.org>
• [openrisc] Problems building tools
  • From: "Robert Cragie" <rcc@jennic.com>
• [openrisc] wrong file format for gdb
  • From: rchowdsl@pacbell.net
• Re: [openrisc] xori instruction
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [openrisc] Cache invalidation & synchronization
  • From: "Damjan Lampret" <lampret@opencores.org>